DS2404B【PDF 4/29 页】IC ECONORAM TIMECHIP 5.5V 16SSOP

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DS2404

12 of 29

Example 2: Write two data bytes to memory locations 0026h and 0027h (the seventh and eighth byte of

page 1). Read entire memory (1-Wire port).

MASTER MODE

DATA(LSB FIRST)

COMMENTS

Reset

reset pulse (480–960

μs)

Presence

presence pulse

CCh

Issue “skip ROM” command

0Fh

Issue “write scratchpad” command

26h

TA1, beginning offset=6

00h

TA2, address=0026h

<2 data bytes>

Write 2 bytes of data to scratchpad

Reset

reset pulse

Presence

presence pulse

CCh

Issue “skip ROM” command

AAh

Issue “read scratchpad” command

26h

Read TA1, beginning offset=6

00h

Read TA2, address=0026h

07h

Read E/S, ending offset=7, flags=0

<2 data bytes>

Read scratchpad data and verify

Reset

reset pulse

Presence

presence pulse

CCh

Issue “skip ROM” command

55h

Issue “copy scratchpad” command

26h

00h

07h

TA1

TA2

AUTHORIZATION CODE

E/S

Reset

reset pulse

Presence

presence pulse

CCh

Issue “skip ROM” command

F0h

Issue “read memory” command

00h

TA1, beginning offset=0

00h

TA2, address=0000h

<542 bytes>

Read entire memory

Reset

reset pulse

Presence

presence pulse, done

WRITE PROTECT/PROGRAMMABLE EXPIRATION

The write protect bits (WPR, WPI, WPC) provide a means of write protecting the timekeeping data and

limiting access to the DS2404 when an alarm occurs (programmable expiration).

The write protect bits may not be written by performing a single copy scratchpad command. Instead, to

write these bits, the copy scratchpad command must be performed three times. Please note that the AA bit

will be set, as expected, after the first copy command is successfully executed. Therefore, the

authorization pattern for the second and third copy command should have this bit set. The read

scratchpad command may be used to verify the authorization pattern.

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